The present invention relates generally to the removal of residues during fabrication of integrated circuits. More particularly, the invention relates to the removal of residues after opening vias for contact formation.
During fabrication of integrated circuits, it is often necessary to construct vias to interconnect metal lines or other devices in the semiconductor. These vias, are etched through an insulating layer to expose a metal or other conductive element below. The insulating layer is typically a form of oxide, such that fluorocarbons are used to etch through the insulating layers. In plasma etch reactors, the wafer is often subjected to an electrical bias to obtain more uniform etching. Biasing the wafer also greatly increases the rate of etching.
Organic residues are left in the via after the etching process. These residues can compromise the reliability of the contact to be formed within the via, and should therefore be removed. Typically, the residue is removed with an organic stripper, which simultaneously strips the resist mask. Such organic strips are expensive and difficult to dispose, however, such that oxygen plasma is more currently favored to burn off the resist and etch residue.
More recently, fluorine has been added to an oxygen plasma strip, aiding the complete removal of the residue by undercutting the oxide walls. Unfortunately, the fluorine also undercuts the metal and can also laterally recess upper layers of the metal. If this lateral recessing causes a gap between the dielectric and the metal line below, filling the via with conductive material to form a contact between two layers will be incomplete, and the resulting contact will have reliability problems.
U.S. Pat. No. 5,661,083 discloses reactive ion etches to clear the via walls. These etches also entail reliability issues due to metallic recessing, as well as safety problems from use of explosive mixtures and dimension control.
Accordingly, there is a need for a method of effectively removing residue from etching a via. Desirably, the method should protect the via surfaces, and particularly the metal layers exposed by the via etch.
In accordance with one aspect of the invention, a method is provided for fabricating a conductive contact through an insulating layer in an integrated circuit. A via is first etched through the insulating layer to expose a first metal element. The via sidewall is then exposed to a vapor formed, at least in part, from ammonia. Thereafter, a conductive material is deposited into the via.
In accordance with another aspect of the invention, a method is disclosed for removing etch residue from the via after the via has been etched through an insulating layer in a partially fabricated integrated circuit assembly. The etch residue is exposed to a plasma formed from a non-explosive source of hydrogen and oxygen. In accordance with still another aspect of the invention, a method is provided for forming an integrated circuit. A patterned mask is formed from a resist layer over a dielectric layer. A via is then formed in the dielectric layer by etching through the mask. This via is cleaned by exposure to a plasma generated from ammonia.